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ARC
2009
Springer
175views Hardware» more  ARC 2009»
14 years 16 days ago
A Hardware Accelerated Simulation Environment for Spiking Neural Networks
Spiking Neural Networks (SNNs) model the biological functions of the human brain enabling neuro/computer scientists to investigate how arrays of neurons can be used to solve comput...
Brendan P. Glackin, Jim Harkin, T. Martin McGinnit...
BCS
2008
13 years 7 months ago
A Hardware Relaxation Paradigm for Solving NP-Hard Problems
Digital circuits with feedback loops can solve some instances of NP-hard problems by relaxation: the circuit will either oscillate or settle down to a stable state that represents...
Paul Cockshott, Andreas Koltes, John O'Donnell, Pa...
IAJIT
2010
140views more  IAJIT 2010»
13 years 4 months ago
HW/SW Design-Based Implementation of Vector Median Rational Hybrid Filter
: A new code sign implementation of vector median rational hybrid filter based on efficient hardware/software implementation is introduced and applied to colour image filtering pro...
Anis Boudabous, Ahmed Ben Atitallah, Lazhar Khriji...
IPPS
2008
IEEE
14 years 4 days ago
Energy efficient packet classification hardware accelerator
Packet classification is an important function in a router’s line-card. Although many excellent solutions have been proposed in the past, implementing high speed packet classifi...
Alan Kennedy, Xiaojun Wang, Bin Liu
PG
2002
IEEE
13 years 10 months ago
Visualization of Multidimensional, Multivariate Volume Data Using Hardware-Accelerated Non-Photorealistic Rendering Techniques
This paper presents a set of feature enhancement techniques coupled with hardware-accelerated nonphotorealistic rendering for generating more perceptually effective visualizations...
Aleksander Stompel, Eric B. Lum, Kwan-Liu Ma