20 search results - page 1 / 4 » Hardware-Assisted Design for Fast Packet Forwarding in Paral... |
ICPP
2003
IEEE
13 years 9 months ago
2003
IEEE
A hardware-assisted design, dubbed cache-oriented multistage structure (COMS), is proposed for fast packet forwarding. COMS incorporates small on-chip cache memory in its constitu...
SIGCOMM
2009
ACM
13 years 11 months ago
2009
ACM
As forwarding tables and link speeds continue to grow, fast packet forwarding becomes increasingly challenging for enterprise edge routers. Simply building routers with ever large...
HOTI
2005
IEEE
13 years 10 months ago
2005
IEEE
High performance routers require substantial amounts of memory to store packets awaiting transmission, requiring the use of dedicated memory devices with the density and capacity ...
AINA
2009
IEEE
13 years 11 months ago
2009
IEEE
IP address lookup is one of the most important functionalities in the router design. To meet the requirements in high speed routers consisting of linecards with 40Gbps transfer ra...
INFOCOM
1999
IEEE
13 years 8 months ago
1999
IEEE
One of the key design issues for the new generation IP routers is the route lookup mechanism. For each incoming IP packet, the IP routing requires to perform a longest prefix match...