Sciweavers

42 search results - page 4 / 9
» Heterogeneous Programmable Logic Block Architectures
Sort
View
DAC
2004
ACM
14 years 7 months ago
Heterogeneous MP-SoC: the solution to energy-efficient signal processing
To meet conflicting flexibility, performance and cost constraints of demanding signal processing applications, future designs in this domain will contain an increasing number of a...
Tim Kogel, Heinrich Meyr
IJNSEC
2007
137views more  IJNSEC 2007»
13 years 6 months ago
An FPGA-based AES-CCM Crypto Core For IEEE 802.11i Architecture
The widespread adoption of IEEE 802.11 wireless networks has brought its security paradigm under active research. One of the important research areas in this field is the realiza...
Arshad Aziz, Nassar Ikram
ASPLOS
2010
ACM
13 years 11 months ago
An asymmetric distributed shared memory model for heterogeneous parallel systems
Heterogeneous computing combines general purpose CPUs with accelerators to efficiently execute both sequential control-intensive and data-parallel phases of applications. Existin...
Isaac Gelado, Javier Cabezas, Nacho Navarro, John ...
ICCAD
2000
IEEE
104views Hardware» more  ICCAD 2000»
13 years 10 months ago
Diagnosis of Interconnect Faults in Cluster-Based FPGA Architectures
— Fault diagnosis has particular importance in the context of field programmable gate arrays (FPGAs) because faults can be avoided by reconfiguration at almost no real cost. Cl...
Ian G. Harris, Russell Tessier
DATE
1999
IEEE
194views Hardware» more  DATE 1999»
13 years 10 months ago
CRUSADE: Hardware/Software Co-Synthesis of Dynamically Reconfigurable Heterogeneous Real-Time Distributed Embedded Systems
Dynamically reconfigurable embedded systems offer potential for higher performance as well as adaptability to changing system requirements at low cost. Such systems employ run-tim...
Bharat P. Dav