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» Hierarchical Interconnects for On-Chip Clustering
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2009
ACM
14 years 2 days ago
Scalable computing with parallel tasks
Recent and future parallel clusters and supercomputers use SMPs and multi-core processors as basic nodes, providing a huge amount of parallel resources. These systems often have h...
Jörg Dümmler, Thomas Rauber, Gudula R&uu...
IPPS
1999
IEEE
13 years 9 months ago
Hardwired-Clusters Partial-Crossbar: A Hierarchical Routing Architecture for Multi-FPGA Systems
Multi-FPGA systems (MFSs) are used as custom computing machines, logic emulators and rapid prototyping vehicles. A key aspect of these systems is their programmable routing archit...
Mohammed A. S. Khalid, Jonathan Rose
CLUSTER
2000
IEEE
13 years 9 months ago
Contention-free Complete Exchange Algorithm on Clusters
To construct a large commodity clustec a hierarchical network is generally adopted for connecting the host muchines, where a Gigabit backbone switch connects a few commodity switc...
Anthony T. C. Tam, Cho-Li Wang
PDPTA
2004
13 years 6 months ago
MP-Cluma - A CORBA Based Cluster Management Tool
There are many underlying hardware architectures for execution of parallel applications. One of these is the Network of Workstations (NOW) which is an interesting solution for use...
Silke Schuch, Martin Pöppe
ICCAD
1997
IEEE
90views Hardware» more  ICCAD 1997»
13 years 9 months ago
A hierarchical decomposition methodology for multistage clock circuits
† This paper describes a novel methodology to automate the design of the interconnect distribution for multistage clock circuits. We introduce two key ideas. First, a hierarchica...
Gary Ellis, Lawrence T. Pileggi, Rob A. Rutenbar