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SIGCOMM
1994
ACM
13 years 9 months ago
User-Space Protocols Deliver High Performance to Applications on a Low-Cost Gb/s LAN
Aled Edwards, Greg Watson, John Lumley, David Bank...
ARVLSI
1997
IEEE
151views VLSI» more  ARVLSI 1997»
13 years 8 months ago
The Hierarchical Multi-Bank DRAM: A High-Performance Architecture for Memory Integrated with Processors
A microprocessor integrated with DRAM on the same die has the potential to improve system performance by reducing the memory latency and improving the memory bandwidth. However, a...
Tadaaki Yamauchi, Lance Hammond, Kunle Olukotun
WCE
2007
13 years 6 months ago
VHDL Implementation of Multiplierless, High Performance DWT Filter Bank
—The JPEG 2000 image coding standard employs the biorthogonal 9/7 wavelet for lossy compression. The performance of hardware implementation of 9/7-filter bank depends on accuracy...
M. M. Aswale, R. B. Patil
RIDE
1997
IEEE
13 years 9 months ago
High Performance Banking
Jon Keane
ICCD
2005
IEEE
110views Hardware» more  ICCD 2005»
14 years 2 months ago
Implementing Caches in a 3D Technology for High Performance Processors
3D integration is an emergent technology that has the potential to greatly increase device density while simultaneously providing faster on-chip communication. 3D fabrication invo...
Kiran Puttaswamy, Gabriel H. Loh