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» High-Level Power Estimation and Low-Power Design Space Explo...
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ICASSP
2008
IEEE
14 years 18 days ago
Accurate models for estimating area and power of FPGA implementations
This paper presents accurate area and power estimation models for implementations using FPGAs from the Xilinx Virtex-2Pro family. These models are designed to facilitate efficien...
Lanping Deng, Kanwaldeep Sobti, Chaitali Chakrabar...
CASES
2007
ACM
13 years 10 months ago
INTACTE: an interconnect area, delay, and energy estimation tool for microarchitectural explorations
Prior work on modeling interconnects has focused on optimizing the wire and repeater design for trading off energy and delay, and is largely based on low level circuit parameters....
Rahul Nagpal, Arvind Madan, Bharadwaj Amrutur, Y. ...
VLSISP
2011
216views Database» more  VLSISP 2011»
13 years 1 months ago
Accurate Area, Time and Power Models for FPGA-Based Implementations
This paper presents accurate area, time, power estimation models for implementations using FPGAs from the Xilinx Virtex-2Pro family [1]. These models are designed to facilitate ef...
Lanping Deng, Kanwaldeep Sobti, Yuanrui Zhang, Cha...
TVLSI
1998
83views more  TVLSI 1998»
13 years 5 months ago
Low overhead fault-tolerant FPGA systems
— Fault-tolerance is an important system metric for many operating environments, from automotive to space exploration. The conventional technique for improving system reliability...
John Lach, William H. Mangione-Smith, Miodrag Potk...
CASES
2003
ACM
13 years 9 months ago
A hierarchical approach for energy efficient application design using heterogeneous embedded systems
Several features such as reconfiguration, voltage and frequency scaling, low-power operating states, duty-cycling, etc. are exploited for latency and energy efficient application ...
Sumit Mohanty, Viktor K. Prasanna