17 search results - page 4 / 4 » High-Radix Implementation of IEEE Floating-Point Addition |
DSD
2004
IEEE
13 years 9 months ago
2004
IEEE
In this paper we present an analysis of the minimal hardware precision required to implement Support Vector Machine (SVM) classification within a Logarithmic Number System archite...
MICRO
1992
IEEE
13 years 9 months ago
1992
IEEE
An important design decision in the implementation of a superscalar processor is the amount of hardware to allocate to the instruction scheduling mechanism. Dynamic scheduling pro...