Sciweavers

2 search results - page 1 / 1
» High-throughput Contention-Free concurrent interleaver archi...
Sort
View
ASAP
2011
IEEE
247views Hardware» more  ASAP 2011»
12 years 4 months ago
High-throughput Contention-Free concurrent interleaver architecture for multi-standard turbo decoder
—To meet the higher data rate requirement of emerging wireless communication technology, numerous parallel turbo decoder architectures have been developed. However, the interleav...
Guohui Wang, Yang Sun, Joseph R. Cavallaro, Yuanbi...
ICASSP
2011
IEEE
12 years 8 months ago
A methodology based on Transportation problem modeling for designing parallel interleaver architectures
For high-data-rate applications, turbo-like iterative decoders are implemented with parallel hardware architecture. However, to achieve high throughput, concurrent accesses to each...
Awais Sani, Philippe Coussy, Cyrille Chavet, Eric ...