8 search results - page 1 / 2 » IDAP: A Tool for High Level Power Estimation of Custom Array... |
ICCAD
2003
IEEE
14 years 1 months ago
2003
IEEE
—While array structures are a significant source of power dissipation, there is a lack of accurate high-level power estimators that account for varying array circuit implementat...
CODES
2004
IEEE
13 years 8 months ago
2004
IEEE
There is a growing need for accurate power models at the system level. Memory structures such as caches, Branch Target Buffers (BTBs), and register files occupy significant area i...
ICCD
2001
IEEE
14 years 1 months ago
2001
IEEE
In this paper, we present a high-level power modeling technique to estimate the power consumption of reconfigurable devices such as complex programmable logic devices (CPLDs) and ...
SAMOS
2004
Springer
13 years 9 months ago
2004
Springer
In recent years, power consumption has become a critical concern for many VLSI systems. Whereas several case studies demonstrate that technology-, layout-, and gate-level technique...
DAC
1997
ACM
13 years 8 months ago
1997
ACM
We describe an architectural design space exploration methodology that minimizes the energy dissipation of digital circuits. The centerpiece of our methodology is a Verilog-based ...