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MICRO
2003
IEEE
128views Hardware» more  MICRO 2003»
13 years 9 months ago
IPStash: a Power-Efficient Memory Architecture for IP-lookup
Abstract—High-speed routers often use commodity, fully-associative, TCAMs (Ternary Content Addressable Memories) to perform packet classification and routing (IP lookup). We prop...
Stefanos Kaxiras, Georgios Keramidas
GLOBECOM
2007
IEEE
13 years 10 months ago
Power Efficient IP Lookup with Supernode Caching
— In this paper, we propose a novel supernode caching scheme to reduce IP lookup latencies and energy consumption in network processors. In stead of using an expensive TCAM based...
Lu Peng, Wencheng Lu, Lide Duan
ANCS
2006
ACM
13 years 9 months ago
CAMP: fast and efficient IP lookup architecture
A large body of research literature has focused on improving the performance of longest prefix match IP-lookup. More recently, embedded memory based architectures have been propos...
Sailesh Kumar, Michela Becchi, Patrick Crowley, Jo...
INFOCOM
2005
IEEE
13 years 9 months ago
IPStash: a set-associative memory approach for efficient IP-lookup
—IP-Lookup is a challenging problem because of the increasing routing table sizes, increased traffic, and higher speed links. These characteristics lead to the prevalence of hard...
Stefanos Kaxiras, Georgios Keramidas
CASES
2010
ACM
13 years 1 months ago
Improved procedure placement for set associative caches
The performance of most embedded systems is critically dependent on the memory hierarchy performance. In particular, higher cache hit rate can provide significant performance boos...
Yun Liang, Tulika Mitra