25 search results - page 1 / 5 » Identifying and Exploiting Spatial Regularity in Data Memory... |
SC
2003
ACM
13 years 10 months ago
2003
ACM
The growing processor/memory performance gap causes the performance of many codes to be limited by memory accesses. If known to exist in an application, strided memory accesses fo...
ISCA
1998
IEEE
13 years 9 months ago
1998
IEEE
Modern cache designs exploit spatial locality by fetching large blocks of data called cache lines on a cache miss. Subsequent references to words within the same cache line result...
ICCAD
2008
IEEE
14 years 1 months ago
2008
IEEE
— Leveraging the power of scratchpad memories (SPMs) available in most embedded systems today is crucial to extract maximum performance from application programs. While regular a...
ISPASS
2008
IEEE
13 years 11 months ago
2008
IEEE
—The potential for improving the performance of data-intensive scientific programs by enhancing data reuse in cache is substantial because CPUs are significantly faster than me...
CGO
2003
IEEE
13 years 8 months ago
2003
IEEE
In this paper, we present METRIC, an environment for determining memory inefficiencies by examining data traces. METRIC is designed to alter the performance behavior of applicatio...