Sciweavers

34 search results - page 2 / 7
» Impact of Cache Coherence Protocols on the Processing of Net...
Sort
View
MICRO
2006
IEEE
155views Hardware» more  MICRO 2006»
13 years 11 months ago
In-Network Cache Coherence
With the trend towards increasing number of processor cores in future chip architectures, scalable directory-based protocols for maintaining cache coherence will be needed. Howeve...
Noel Eisley, Li-Shiuan Peh, Li Shang
ICPP
1994
IEEE
13 years 10 months ago
A Distributed Cache Coherence Protocol for Hypercube Multiprocessors
- This paper proposes a distributed directory cache coherence protocol and compares the performance of the proposed protocol with fully mapped and single linked list protocols for ...
Yeimkuan Chang, Laxmi N. Bhuyan, Akhilesh Kumar
HPCA
2007
IEEE
14 years 3 days ago
Error Detection via Online Checking of Cache Coherence with Token Coherence Signatures
To provide high dependability in a multithreaded system despite hardware faults, the system must detect and correct errors in its shared memory system. Recent research has explore...
Albert Meixner, Daniel J. Sorin
DSN
2008
IEEE
14 years 7 days ago
A fault-tolerant directory-based cache coherence protocol for CMP architectures
Current technology trends of increased scale of integration are pushing CMOS technology into the deepsubmicron domain, enabling the creation of chips with a significantly greater...
Ricardo Fernández Pascual, José M. G...
JEC
2006
90views more  JEC 2006»
13 years 5 months ago
The impact of traffic aggregation on the memory performance of networking applications
The trend of the networking processing is to increase the intelligence of the routers (i.e. security capacities). This means that there is an increment in the workload generated p...
Javier Verdú, Jorge García-Vidal, Ma...