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ICCD
2002
IEEE
93views Hardware» more  ICCD 2002»
14 years 1 months ago
Impact of Scaling on the Effectiveness of Dynamic Power Reduction Schemes
Power is considered to be the major limiter to the design of more faster and complex processors in the near future. In order to address this challenge, a combination of process, c...
David Duarte, Narayanan Vijaykrishnan, Mary Jane I...
DATE
2002
IEEE
156views Hardware» more  DATE 2002»
13 years 9 months ago
Dynamic VTH Scaling Scheme for Active Leakage Power Reduction
We present a Dynamic VTH Scaling (DVTS) scheme to save the leakage power during active mode of the circuit. The power saving strategy of DVTS is similar to that of the Dynamic VDD...
Chris H. Kim, Kaushik Roy
MICRO
2002
IEEE
117views Hardware» more  MICRO 2002»
13 years 4 months ago
Drowsy instruction caches: leakage power reduction using dynamic voltage scaling and cache sub-bank prediction
On-chip caches represent a sizeable fraction of the total power consumption of microprocessors. Although large caches can significantly improve performance, they have the potentia...
Nam Sung Kim, Krisztián Flautner, David Bla...
CAL
2004
13 years 4 months ago
Comparing Adaptive Routing and Dynamic Voltage Scaling for Link Power Reduction
We compare techniques that dynamically scale the voltage of individual network links to reduce power consumption with an approach in which all links in the network are set to the s...
J. M. Stine, N. P. Carter
EUC
2008
Springer
13 years 6 months ago
A Generalized Framework for System-Wide Energy Savings in Hard Real-Time Embedded Systems
A generalized dynamic energy performance scaling (DEPS) framework is proposed for exploring applicationspecific energy-saving potential in hard real-time embedded systems. This so...
Gang Zeng, Hiroyuki Tomiyama, Hiroaki Takada, Tohr...