15 search results - page 1 / 3 » Impact of Self-Heating in Wire Interconnection on Timing |
IEICET
2010
13 years 3 months ago
2010
ICCAD
2003
IEEE
14 years 1 months ago
2003
IEEE
Under modern VLSI technology, process variations greatly affect circuit performance, especially clock skew which is very timing sensitive. Unwanted skew due to process variation f...
IPPS
1998
IEEE
13 years 8 months ago
1998
IEEE
In this paper, the effect of switch design on the application performance of cache-coherent non-uniform memory access (CC-NUMA) multiprocessors is studied in detail. Wormhole rout...
TCAD
2002
13 years 4 months ago
2002
This paper introduces an accurate analysis of on-chip inductance effects for distributed interconnects that takes the effect of both the series resistance and the output parasitic ...
GLVLSI
2006
IEEE
13 years 10 months ago
2006
IEEE
Process technology and environment-induced variability of gates and wires in VLSI circuits make timing analyses of such circuits a challenging task. Process variation can have a s...