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» Impact of Technology Scaling in the Clock System Power
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EMSOFT
2005
Springer
13 years 11 months ago
AutoDVS: an automatic, general-purpose, dynamic clock scheduling system for hand-held devices
We present AutoDVS, a dynamic voltage scaling (DVS) system for hand-held computers. Unlike extant DVS systems, AutoDVS distinguishes common, course-grain, program behavior and cou...
Selim Gurun, Chandra Krintz
DATE
2003
IEEE
127views Hardware» more  DATE 2003»
13 years 10 months ago
Exploring High Bandwidth Pipelined Cache Architecture for Scaled Technology
In this paper we propose a design technique to pipeline cache memories for high bandwidth applications. With the scaling of technology cache access latencies are multiple clock cy...
Amit Agarwal, Kaushik Roy, T. N. Vijaykumar
ICCD
2008
IEEE
111views Hardware» more  ICCD 2008»
14 years 2 months ago
Power switch characterization for fine-grained dynamic voltage scaling
—Dynamic voltage scaling (DVS) provides power savings for systems with varying performance requirements. One low overhead implementation of DVS uses PMOS power switches to connec...
Liang Di, Mateja Putic, John Lach, Benton H. Calho...
RTAS
2000
IEEE
13 years 9 months ago
Voltage-Clock-Scaling Adaptive Scheduling Techniques for Low Power in Hard Real-Time Systems
—Many embedded systems operate under severe power and energy constraints. Voltage clock scaling is one mechanism by which energy consumption may be reduced: It is based on the fa...
C. Mani Krishna, Yann-Hang Lee
DATE
2006
IEEE
87views Hardware» more  DATE 2006»
13 years 11 months ago
Thermal resilient bounded-skew clock tree optimization methodology
The existence of non-uniform thermal gradients on the substrate in high performance IC’s can significantly impact the performance of global on-chip interconnects. This issue is...
Ashutosh Chakraborty, Prassanna Sithambaram, Karth...