Sciweavers

59 search results - page 1 / 12
» Implementation and Performance Analysis of a Packet Schedule...
Sort
View
LCN
2005
IEEE
13 years 10 months ago
Implementation and Performance Analysis of a Packet Scheduler on a Programmable Network Processor
— The problem of achieving fairness in the allocation of the bandwidth resource on a link shared by multiple flows of traffic has been extensively researched over the last deca...
Fariza Sabrina, Salil S. Kanhere, Sanjay Jha
INFOCOM
2002
IEEE
13 years 9 months ago
Scheduling Processing Resources in Programmable Routers
—To provide flexibility in deploying new protocols and services, general-purpose processing engines are being placed in the datapath of routers. Such network processors are typi...
Prashanth Pappu, Tilman Wolf
INFOCOM
2007
IEEE
13 years 11 months ago
On the Extreme Parallelism Inside Next-Generation Network Processors
Next-generation high-end Network Processors (NP) must address demands from both diversified applications and ever-increasing traffic pressure. One major challenge is to design an e...
Lei Shi, Yue Zhang 0006, Jianming Yu, Bo Xu, Bin L...
SIGMETRICS
2004
ACM
127views Hardware» more  SIGMETRICS 2004»
13 years 10 months ago
Performance analysis of LAS-based scheduling disciplines in a packet switched network
The Least Attained Service (LAS) scheduling policy, when used for scheduling packets over the bottleneck link of an Internet path, can greatly reduce the average flow time for sh...
Idris A. Rai, Guillaume Urvoy-Keller, Mary K. Vern...
RTSS
2006
IEEE
13 years 10 months ago
Processor Scheduler for Multi-Service Routers
In this paper, we describe the design and evaluation of a scheduler (referred to as Everest) for allocating processors to services in high performance, multi-service routers. A sc...
Ravi Kokku, Upendra Shevade, Nishit Shah, Ajay Mah...