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» Implementation and Performance Evaluation of LT and Raptor C...
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2005
ACM
13 years 10 months ago
Performance-constrained Distributed DVS Scheduling for Scientific Applications on Power-aware Clusters
Left unchecked, the fundamental drive to increase peak performance using tens of thousands of power hungry components will lead to intolerable operating costs and failure rates. H...
Rong Ge, Xizhou Feng, Kirk W. Cameron
ESTIMEDIA
2008
Springer
13 years 6 months ago
Serialized multitasking code generation from dataflow specification
This paper is concerned about multitasking embedded software development from the system specification to the final implementation including design space exploration(DSE). In the ...
Seongnam Kwon, Soonhoi Ha
CODES
2010
IEEE
13 years 2 months ago
Worst-case performance analysis of synchronous dataflow scenarios
Synchronous Dataflow (SDF) is a powerful analysis tool for regular, cyclic, parallel task graphs. The behaviour of SDF graphs however is static and therefore not always able to ac...
Marc Geilen, Sander Stuijk
SECON
2008
IEEE
13 years 11 months ago
Content Distribution in VANETs Using Network Coding: The Effect of Disk I/O and Processing O/H
Abstract—Besides safe navigation (e.g., warning of approaching vehicles), car to car communications will enable a host of new applications, ranging from office-on-the-wheel supp...
Seung-Hoon Lee, Uichin Lee, Kang-Won Lee, Mario Ge...
CODES
2005
IEEE
13 years 10 months ago
High-level synthesis for large bit-width multipliers on FPGAs: a case study
In this paper, we present the analysis, design and implementation of an estimator to realize large bit width unsigned integer multiplier units. Larger multiplier units are require...
Gang Quan, James P. Davis, Siddhaveerasharan Devar...