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VLSISP
2008
123views more  VLSISP 2008»
8 years 11 months ago
Implementation of a Coarse-Grained Reconfigurable Media Processor for AVC Decoder
ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) is a templatized coarse-grained reconfigurable processor architecture. It targets at embedded applications whic...
Bingfeng Mei, Bjorn De Sutter, Tom Vander Aa, M. W...
TVLSI
2008
132views more  TVLSI 2008»
8 years 11 months ago
Towards Software Defined Radios Using Coarse-Grained Reconfigurable Hardware
Mobile wireless terminals tend to become multimode wireless communication devices. Furthermore, these devices become adaptive. Heterogeneous reconfigurable hardware provides the fl...
Gerard K. Rauwerda, Paul M. Heysters, Gerard J. M....
DSD
2006
IEEE
116views Hardware» more  DSD 2006»
9 years 5 months ago
Hardware/Software Co-design Applied to Reed-Solomon Decoding for the DMB Standard
This paper addresses the implementation of ReedSolomon decoding for battery-powered wireless devices. The scope of this paper is constrained by the Digital Media Broadcasting (DMB...
Arjan C. Dam, Michel G. J. Lammertink, Kenneth C. ...
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