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» Implementation of a SystemC based Environment
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FDL
2005
IEEE
13 years 10 months ago
Implementation of a SystemC based Environment
Verification and validation are key issues for today's SoC design projects. This paper presents the implementation of a SystemC based environment for transaction-based verifi...
Richard Hoffer, Frank Baszynski
DATE
2003
IEEE
119views Hardware» more  DATE 2003»
13 years 9 months ago
IPSIM: SystemC 3.0 Enhancements for Communication Refinement
Refinement is a key methodology for SoC design. The proposed IPSIM design environment, based on a C++ modeling library developed on top of SystemC 3.0, supports an object-oriented...
Marcello Coppola, Stephane Curaba, Miltos D. Gramm...
ICCD
2002
IEEE
135views Hardware» more  ICCD 2002»
14 years 1 months ago
Legacy SystemC Co-Simulation of Multi-Processor Systems-on-Chip
We present a co-simulation environment for multiprocessor architectures, that is based on SystemC and allows a transparent integration of instruction set simulators (ISSs) within ...
Luca Benini, Davide Bertozzi, Davide Bruni, Nicola...
IPPS
2003
IEEE
13 years 9 months ago
System-Level Modeling of Dynamically Reconfigurable Hardware with SystemC
To cope with the increasing demand for higher computational power and flexibility, dynamically reconfigurable blocks become an important part inside a system-on-chip. Several meth...
Antti Pelkonen, Kostas Masselos, Miroslav Cup&aacu...
DT
2006
180views more  DT 2006»
13 years 4 months ago
A SystemC Refinement Methodology for Embedded Software
process: Designers must define higher abstraction levels that allow system modeling. They must use description languages that handle both hardware and software components to descri...
Jérôme Chevalier, Maxime de Nanclas, ...