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ISCAS
1993
IEEE
133views Hardware» more  ISCAS 1993»
13 years 9 months ago
An efficient FIR filter architecture
– This paper describes an efficient architecture for FIR filters. By exploiting the reduced complexity made possible by the use of sparse powers-of-two coefficients, an FIR ...
Joseph B. Evans
EH
2003
IEEE
138views Hardware» more  EH 2003»
13 years 10 months ago
Implementing Evolution of FIR-Filters Efficiently in an FPGA
Reconfigurable hardware devices make it possible to change the topology of electronic circuits at runtime. Using reconfigurable devices as a platform for Evolvable hardware (EHW) ...
Knut Arne Vinger, Jim Torresen