13 search results - page 3 / 3 » Implementing Hard Real-Time Transactions on Multiprocessors |
MICRO
2007
IEEE
13 years 11 months ago
2007
IEEE
Snoopy cache coherence can be implemented in any physical network topology by embedding a logical unidirectional ring in the network. Control messages are forwarded using the ring...
RTAS
2006
IEEE
2006
IEEE
METERG: Measurement-Based End-to-End Performance Estimation Technique in QoS-Capable Multiprocessors
13 years 10 months ago
Multiprocessor systems present serious challenges in the design of real-time systems due to the wider variation of execution time of an instruction sequence compared to a uniproce...
ISCA
2006
IEEE
13 years 10 months ago
2006
IEEE
Transactional Memory (TM), Thread-Level Speculation (TLS), and Checkpointed multiprocessors are three popular architectural techniques based on the execution of multiple, cooperat...