45 search results - page 2 / 9 » Implementing Sorting Networks with Spiking Neural P Systems |
ISCAS
2006
IEEE
13 years 10 months ago
2006
IEEE
Extremely low power consumption is the critical constraint for designing implantable neural decoders that inter- Desired face directly with the nervous system. Typically a system w...
ESANN
2006
13 years 6 months ago
2006
Abstract. Despite several previous studies, little progress has been made in building successful neural systems for image segmentation in digital hardware. Spiking neural networks ...
CDC
2008
IEEE
13 years 11 months ago
2008
IEEE
— The detection of transient responses, i.e. non– stationarities, that arise in a varying and small fraction of the total number of neural spike trains recorded from chronicall...
ISCAS
2008
IEEE
13 years 11 months ago
2008
IEEE
— This paper presents an analogue integrated circuit implementation of a cortical neuron model. The VLSI chip prototype has been implemented in a 0.35 µm CMOS technology. The si...
ICES
2003
Springer
13 years 9 months ago
2003
Springer
Abstract. Vertebrate and most invertebrate organisms interact with their environment through processes of adaptation and learning. Such processes are generally controlled by comple...