35 search results - page 1 / 7 » Implication graph based domino logic synthesis |
ICCAD
1999
IEEE
13 years 8 months ago
1999
IEEE
In this paper, we present a new approach to the problem of inverter elimination in domino logic synthesis. A small piece of static CMOS logic is introduced to the circuit to avoid...
VLSID
2002
IEEE
14 years 4 months ago
2002
IEEE
This paper presents a novel approach for the synthesis of dynamic CMOS circuits using Domino and Nora styles. As these logic styles can implement only non-inverting logic, convent...
CORR
2004
Springer
13 years 4 months ago
2004
Springer
We introduce regular graph constraints and explore their decidability properties. The motivation for regular graph constraints is 1) type checking of changing types of objects in ...
GLVLSI
2007
IEEE
13 years 11 months ago
2007
IEEE
A PAL-based logic block is the core of great majority of contemporary CPLD devices. The purpose of the paper is to present a new approach to multi-level synthesis for PAL-based CP...
ICCAD
1999
IEEE
13 years 8 months ago
1999
IEEE
In this paper we present new methods for fast justification and propagation in the implication graph (IG) which is the core data structure of our SAT based implication engine. As ...