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» Improved procedure placement for set associative caches
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CASES
2010
ACM
13 years 2 months ago
Improved procedure placement for set associative caches
The performance of most embedded systems is critically dependent on the memory hierarchy performance. In particular, higher cache hit rate can provide significant performance boos...
Yun Liang, Tulika Mitra
MICRO
2009
IEEE
159views Hardware» more  MICRO 2009»
13 years 11 months ago
Adaptive line placement with the set balancing cache
Efficient memory hierarchy design is critical due to the increasing gap between the speed of the processors and the memory. One of the sources of inefficiency in current caches is...
Dyer Rolán, Basilio B. Fraguela, Ramon Doal...
NETWORKING
2008
13 years 6 months ago
Cache Placement Optimization in Hierarchical Networks: Analysis and Performance Evaluation
Caching popular content in the Internet has been recognized as one of the effective solution to alleviate network congestion and accelerate user information access. Sharing and coo...
Wenzhong Li, Edward Chan, Yilin Wang, Daoxu Chen, ...
CAL
2010
13 years 2 months ago
A Dynamic Pressure-Aware Associative Placement Strategy for Large Scale Chip Multiprocessors
This paper describes dynamic pressure-aware associative placement (DPAP), a novel distributed cache management scheme for large-scale chip multiprocessors. Our work is motivated by...
Mohammad Hammoud, Sangyeun Cho, Rami G. Melhem
ICS
1997
Tsinghua U.
13 years 8 months ago
Eliminating Cache Conflict Misses through XOR-Based Placement Functions
This paper makes the case for the use of XOR-based placement functions for cache memories. It shows that these XOR-mapping schemes can eliminate many conflict misses for direct-ma...
Antonio González, Mateo Valero, Nigel P. To...