9 search results - page 2 / 2 » Improving Cache Effectiveness through Array Data Layout Mani... |
IEEEPACT
1998
IEEE
13 years 8 months ago
1998
IEEE
Global locality analysis is a technique for improving the cache performance of a sequence of loop nests through a combination of loop and data layout optimizations. Pure loop tran...
COMPUTER
2000
13 years 4 months ago
2000
Processor and memory technology trends portend a continual increase in the relative cost of accessing main memory. Machine designers have tried to mitigate the effect of this tren...
TJS
2002
13 years 4 months ago
2002
A significant source for enhancing application performance and for reducing power consumption in embedded processor applications is to improve the usage of the memory hierarchy. In...
ISCA
2010
IEEE
13 years 9 months ago
2010
IEEE
In computer architecture, caches have primarily been viewed as a means to hide memory latency from the CPU. Cache policies have focused on anticipating the CPU’s data needs, and...