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HPCA
2012
IEEE
12 years 23 days ago
Balancing DRAM locality and parallelism in shared memory CMP systems
Modern memory systems rely on spatial locality to provide high bandwidth while minimizing memory device power and cost. The trend of increasing the number of cores that share memo...
Min Kyu Jeong, Doe Hyun Yoon, Dam Sunwoo, Mike Sul...
ICRA
2002
IEEE
102views Robotics» more  ICRA 2002»
13 years 10 months ago
Maximally Informative Statistics for Localization and Mapping
This paper presents an algorithm for simultaneous localization and mapping for a mobile robot using monocular vision and odometry. The approach uses Variable State Dimension Filte...
Matthew Deans
HICSS
1995
IEEE
109views Biometrics» more  HICSS 1995»
13 years 8 months ago
The architecture of an optimistic CPU: the WarpEngine
The architecture for a shared memory CPU is described. The CPU allows for parallelism down to the level of single instructions and is tolerant of memory latency. All executable in...
John G. Cleary, Murray Pearson, Husam Kinawi
ISCA
2012
IEEE
281views Hardware» more  ISCA 2012»
11 years 7 months ago
LOT-ECC: Localized and tiered reliability mechanisms for commodity memory systems
Memory system reliability is a serious and growing concern in modern servers. Existing chipkill-level memory protection mechanisms suffer from several drawbacks. They activate a l...
Aniruddha N. Udipi, Naveen Muralimanohar, Rajeev B...
IJRR
2011
210views more  IJRR 2011»
13 years 4 days ago
Visual-Inertial Sensor Fusion: Localization, Mapping and Sensor-to-Sensor Self-calibration
Visual and inertial sensors, in combination, are able to provide accurate motion estimates and are well-suited for use in many robot navigation tasks. However, correct data fusion...
Jonathan Kelly, Gaurav S. Sukhatme