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ICCAD
1994
IEEE
131views Hardware» more  ICCAD 1994»
13 years 8 months ago
Edge-map: optimal performance driven technology mapping for iterative LUT based FPGA designs
We consider the problem of performance driven lookup-table (LUT) based technology mapping for FPGAs using a general delay model. In the general delay model, each interconnection e...
Hannah Honghua Yang, D. F. Wong
ICSE
2001
IEEE-ACM
13 years 9 months ago
Effective Software Architecture Design: From Global Analysis to UML Descriptions
It is now generally accepted that separating software architecture into multiple views can help in reducing complexity and in making sound decisions about design trade-offs. Our f...
Robert L. Nord, Daniel J. Paulish, Dilip Soni, Chr...
TIFS
2010
184views more  TIFS 2010»
13 years 3 months ago
Information-theoretically secret key generation for fading wireless channels
—The multipath-rich wireless environment associated with typical wireless usage scenarios is characterized by a fading channel response that is time-varying, location-sensitive, ...
Chunxuan Ye, Suhas Mathur, Alex Reznik, Yogendra S...
JSS
2006
88views more  JSS 2006»
13 years 4 months ago
A formal representation of functional size measurement methods
Estimating software size is a difficult task that requires a methodological approach. Many different methods that exist today use distinct abstractions to depict a software system...
Marjan Hericko, Ivan Rozman, Ales Zivkovic
BMCBI
2005
98views more  BMCBI 2005»
13 years 4 months ago
Iterative approach to model identification of biological networks
Background: Recent advances in molecular biology techniques provide an opportunity for developing detailed mathematical models of biological processes. An iterative scheme is intr...
Kapil G. Gadkar, Rudiyanto Gunawan, Francis J. Doy...