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GLVLSI
2009
IEEE
189views VLSI» more  GLVLSI 2009»
13 years 11 months ago
High-performance, cost-effective heterogeneous 3D FPGA architectures
In this paper, we propose novel architectural and design techniques for three-dimensional field-programmable gate arrays (3D FPGAs) with Through-Silicon Vias (TSVs). We develop a...
Roto Le, Sherief Reda, R. Iris Bahar
HPDC
2008
IEEE
13 years 11 months ago
XenLoop: a transparent high performance inter-vm network loopback
Advances in virtualization technology have focused mainly on strengthening the isolation barrier between virtual machines (VMs) that are co-resident within a single physical machi...
Jian Wang, Kwame-Lante Wright, Kartik Gopalan
FGCS
1992
103views more  FGCS 1992»
13 years 6 months ago
Parallel Inference Machine PIM
: There have been no major control problems during the first three years of the new Tokaido-Sanyo Shinkansen (bullet train) Programmed Route Control (PRC) computer system. Prior to...
Kazuo Taki
INFOCOM
2010
IEEE
13 years 3 months ago
Maximizing the Contact Opportunity for Vehicular Internet Access
Abstract—With increasing popularity of media enabled handhelds, the need for high data-rate services for mobile users is evident. Large-scale Wireless LANs (WLANs) can provide su...
Zizhan Zheng, Zhixue Lu, Prasun Sinha, Santosh Kum...
SIGMOD
2004
ACM
149views Database» more  SIGMOD 2004»
14 years 5 months ago
Incremental Maintenance of XML Structural Indexes
Increasing popularity of XML in recent years has generated much interest in query processing over graph-structured data. To support efficient evaluation of path expressions, many ...
Ke Yi, Hao He, Ioana Stanoi, Jun Yang 0001