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ASPDAC
2007
ACM
124views Hardware» more  ASPDAC 2007»
13 years 8 months ago
Improving XOR-Dominated Circuits by Exploiting Dependencies between Operands
Logic synthesis has made impressive progress in the last decade and has pervaded digital design replacing almost universally manual techniques. A remarkable exception is computer ...
Ajay K. Verma, Paolo Ienne
MTV
2007
IEEE
118views Hardware» more  MTV 2007»
13 years 10 months ago
Reduction of Power Dissipation during Scan Testing by Test Vector Ordering
Test vector ordering is recognized as a simple and non-intrusive approach to assist test power reduction. Simulation based test vector ordering approach to minimize circuit transit...
Wang-Dauh Tseng, Lung-Jen Lee
IACR
2011
196views more  IACR 2011»
12 years 4 months ago
Multiparty Computation with Low Communication, Computation and Interaction via Threshold FHE
Fully homomorphic encryption (FHE) provides a simple template for secure computation between two parties (Alice and Bob) where: (I) Alice encrypts her input under her key, (II) Bo...
Gilad Asharov, Abhishek Jain, Daniel Wichs
DAC
2010
ACM
13 years 8 months ago
TSV stress aware timing analysis with applications to 3D-IC layout optimization
As the geometry shrinking faces severe limitations, 3D wafer stacking with through silicon via (TSV) has gained interest for future SOC integration. Since TSV fill material and s...
Jae-Seok Yang, Krit Athikulwongse, Young-Joon Lee,...