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» Improving architecture testability with patterns
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SAC
2008
ACM
13 years 5 months ago
A hybrid software-based self-testing methodology for embedded processor
Software-based self-test (SBST) is emerging as a promising technology for enabling at-speed testing of high-speed embedded processors testing in an SoC system. For SBST, test rout...
Tai-Hua Lu, Chung-Ho Chen, Kuen-Jong Lee
IMC
2010
ACM
13 years 3 months ago
Characterizing radio resource allocation for 3G networks
3G cellular data networks have recently witnessed explosive growth. In this work, we focus on UMTS, one of the most popular 3G mobile communication technologies. Our work is the f...
Feng Qian, Zhaoguang Wang, Alexandre Gerber, Zhuoq...
TVCG
2010
165views more  TVCG 2010»
13 years 7 days ago
Binary Mesh Partitioning for Cache-Efficient Visualization
Abstract--One important bottleneck when visualizing large data sets is the data transfer between processor and memory. Cacheaware (CA) and cache-oblivious (CO) algorithms take into...
Marc Tchiboukdjian, Vincent Danjean, Bruno Raffin
AAAI
2004
13 years 7 months ago
Intelligent Systems Demonstration: The Secure Wireless Agent Testbed (SWAT)
We will demonstrate the Secure Wireless Agent Testbed (SWAT), a unique facility developed at Drexel University to study integration, networking and information assurance for next-...
Gustave Anderson, Andrew Burnheimer, Vincent A. Ci...