Sciweavers

12 search results - page 3 / 3
» Improving cache lifetime reliability at ultra-low voltages
Sort
View
TPDS
2010
109views more  TPDS 2010»
13 years 2 months ago
Thermal-Aware Task Scheduling for 3D Multicore Processors
Abstract—A rising horizon in chip fabrication is the 3D integration technology. It stacks two or more dies vertically with a dense, highspeed interface to increase the device den...
Xiuyi Zhou, Jun Yang 0002, Yi Xu, Youtao Zhang, Ji...
ISPASS
2008
IEEE
13 years 10 months ago
Dynamic Thermal Management through Task Scheduling
The evolution of microprocessors has been hindered by their increasing power consumption and the heat generation speed on-die. High temperature impairs the processor’s reliabili...
Jun Yang 0002, Xiuyi Zhou, Marek Chrobak, Youtao Z...