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» Improving the Efficiency of Run Time Reconfigurable Devices ...
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IPPS
2007
IEEE
13 years 11 months ago
A new framework to accelerate Virtex-II Pro dynamic partial self-reconfiguration
The Xilinx Virtex family of FPGAs provides the ability to perform partial run-time reconfiguration, also known as dynamic partial reconfiguration (DPR). Taking this concept one st...
Christopher Claus, Florian Helmut Müller, Joh...
ASAP
2007
IEEE
157views Hardware» more  ASAP 2007»
13 years 8 months ago
Automatic Generation and Optimisation of Reconfigurable Financial Monte-Carlo Simulations
Monte-Carlo simulations are used in many applications, such as option pricing and portfolio evaluation. Due to their high computational load and intrinsic parallelism, they are id...
David B. Thomas, Jacob A. Bower, Wayne Luk
DATE
2003
IEEE
114views Hardware» more  DATE 2003»
13 years 10 months ago
Software Streaming via Block Streaming
Software streaming allows the execution of streamenabled software on a device even while the transmission/streaming may still be in progress. Thus, the software can be executed wh...
Pramote Kuacharoen, Vincent John Mooney, Vijay K. ...