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» In Search of Speculative Thread-Level Parallelism
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IEEEPACT
2003
IEEE
13 years 10 months ago
Using Software Logging to Support Multi-Version Buffering in Thread-Level Speculation
In Thread-Level Speculation (TLS), speculative tasks generate memory state that cannot simply be combined with the rest of the system because it is unsafe. One way to deal with th...
María Jesús Garzarán, Milos P...
ICS
2009
Tsinghua U.
13 years 12 months ago
Combining thread level speculation helper threads and runahead execution
With the current trend toward multicore architectures, improved execution performance can no longer be obtained via traditional single-thread instruction level parallelism (ILP), ...
Polychronis Xekalakis, Nikolas Ioannou, Marcelo Ci...
CGO
2008
IEEE
13 years 11 months ago
Spice: speculative parallel iteration chunk execution
The recent trend in the processor industry of packing multiple processor cores in a chip has increased the importance of automatic techniques for extracting thread level paralleli...
Easwaran Raman, Neil Vachharajani, Ram Rangan, Dav...
IPPS
2010
IEEE
13 years 3 months ago
Profitability-based power allocation for speculative multithreaded systems
With the shrinking of transistors continuing to follow Moore's Law and the non-scalability of conventional outof-order processors, multi-core systems are becoming the design ...
Polychronis Xekalakis, Nikolas Ioannou, Salman Kha...
ASPLOS
2006
ACM
13 years 11 months ago
Unbounded page-based transactional memory
Exploiting thread level parallelism is paramount in the multi-core era. Transactions enable programmers to expose such parallelism by greatly simplifying the multi-threaded progra...
Weihaw Chuang, Satish Narayanasamy, Ganesh Venkate...