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FPL
2010
Springer
106views Hardware» more  FPL 2010»
13 years 2 months ago
Increasing Design Productivity through Core Reuse, Meta-data Encapsulation, and Synthesis
This paper presents a novel IP core reuse strategy which reduces design time from days to hours for communication circuits such as digital radio receivers. This design productivity...
Adam Arnesen, Kevin Ellsworth, Derrick Gibelyou, T...
FPL
2009
Springer
104views Hardware» more  FPL 2009»
13 years 9 months ago
A multi-layered XML schema and design tool for reusing and integrating FPGA IP
Reconfigurable computing systems remain difficult to use and program. One way to increase design productivity for these systems is through reuse of previously developed and veri...
Adam Arnesen, Nathan Rollins, Michael J. Wirthlin
DAC
2011
ACM
12 years 4 months ago
Supervised design space exploration by compositional approximation of Pareto sets
Technology scaling allows the integration of billions of transistors on the same die but CAD tools struggle in keeping up with the increasing design complexity. Design productivit...
Hung-Yi Liu, Ilias Diakonikolas, Michele Petracca,...
DATE
2009
IEEE
86views Hardware» more  DATE 2009»
13 years 11 months ago
A formal approach to design space exploration of protocol converters
In the field of chip design, hardware module reuse is a standard solution to the increasing complexity of chip architecture and the pressures to reduce time to market. In the abs...
Karin Avnit, Arcot Sowmya
ISMB
2007
13 years 6 months ago
A Chado case study: an ontology-based modular schema for representing genome-associated biological information
Motivation: A few years ago, FlyBase undertook to design a new database schema to store Drosophila data. It would fully integrate genomic sequence and annotation data with bibliog...
Chris Mungall, David B. Emmert