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ENTCS
2007
119views more  ENTCS 2007»
13 years 5 months ago
Interpolant Learning and Reuse in SAT-Based Model Checking
Bounded Model Checking (BMC) is one of the most paradigmatic practical applications of Boolean Satisfiability (SAT). The utilization of SAT in model checking has allowed signifi...
João Marques-Silva
SPIN
2007
Springer
13 years 11 months ago
SAT-Based Summarization for Boolean Programs
Boolean programs are frequently used to model abstractions of software programs. They have the advantage that reachability properties are decidable, despite the fact that their sta...
Gérard Basler, Daniel Kroening, Georg Weiss...
QEST
2006
IEEE
13 years 11 months ago
Modeling Fiber Delay Loops in an All Optical Switch
We analyze the effect of a few fiber delay loops on the number of deflections in an all optical packet switch. The switch is based on the ROMEO architecture developed by Alcatel...
Ana Busic, Mouad Ben Mamoun, Jean-Michel Fourneau
CONCUR
1999
Springer
13 years 9 months ago
Partial Order Reduction for Model Checking of Timed Automata
Abstract. The paper presents a partial order reduction method applicable to networks of timed automata. The advantage of the method is that it reduces both the number of explored c...
Marius Minea
CAV
2004
Springer
152views Hardware» more  CAV 2004»
13 years 10 months ago
Abstract Regular Model Checking
Regular Tree Model Checking Ahmed Bouajjani, Peter Habermehl 1 LIAFA, University Paris 7, Case 7014, 2, place Jussieu, F-75251 Paris Cedex 05, France Adam Rogalewicz, Tom´aˇs Voj...
Ahmed Bouajjani, Peter Habermehl, Tomás Voj...