11 search results - page 1 / 3 » Incremental CTL Model Checking Using BDD Subsetting |
DAC
1998
ACM
14 years 5 months ago
1998
ACM
CAV
2012
Springer
11 years 7 months ago
2012
Springer
A SAT-based incremental, inductive algorithm for model checking CTL properties is proposed. As in classic CTL model checking, the parse graph of the property shapes the analysis. H...
ICFEM
2009
Springer
13 years 2 months ago
2009
Springer
In this paper we continue the study of a strict extension of the Computation Tree Logic, called graded-CTL, recently introduced by the same authors. This new logic augments the sta...
ASPDAC
2007
ACM
13 years 9 months ago
2007
ACM
This paper presents a Boolean based symbolic model checking algorithm for the verification of analog/mixedsignal (AMS) circuits. The systems are modeled in VHDL-AMS, a hardware des...
DAC
2003
ACM
13 years 10 months ago
2003
ACM
Coverage estimation for model checking quantifies the completeness of a set of properties. We present an improved version of the algorithm of Hoskote et al. [7] that applies to a...