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» Incremental and Complete Bounded Model Checking for Full PLT...
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CAV
2005
Springer
127views Hardware» more  CAV 2005»
13 years 10 months ago
Incremental and Complete Bounded Model Checking for Full PLTL
Bounded model checking is an efficient method for finding bugs in system designs. The major drawback of the basic method is that it cannot prove properties, only disprove them. R...
Keijo Heljanko, Tommi A. Junttila, Timo Latvala
DATE
2009
IEEE
90views Hardware» more  DATE 2009»
13 years 11 months ago
Property analysis and design understanding
—Verification is a major issue in circuit and system design. Formal methods like bounded model checking (BMC) can guarantee a high quality of the verification. There are severa...
Ulrich Kühne, Daniel Große, Rolf Drechs...
CORR
2009
Springer
242views Education» more  CORR 2009»
13 years 2 months ago
Adaptive Scheduling of Data Paths using Uppaal Tiga
Abstract. We apply Uppaal Tiga to automatically compute adaptive scheduling strategies for an industrial case study dealing with a state-of-the-art image processing pipeline of a p...
Israa AlAttili, Fred Houben, Georgeta Igna, Steffe...
PLDI
2010
ACM
13 years 9 months ago
Finding low-utility data structures
Many opportunities for easy, big-win, program optimizations are missed by compilers. This is especially true in highly layered Java applications. Often at the heart of these misse...
Guoqing Xu, Nick Mitchell, Matthew Arnold, Atanas ...