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ICCAD
2006
IEEE
99views Hardware» more  ICCAD 2006»
14 years 2 months ago
Information theoretic approach to address delay and reliability in long on-chip interconnects
With shrinking feature size and growing integration density in the Deep Sub-Micron technologies, the global buses are fast becoming the “weakest-links” in VLSI design. They ha...
Rohit Singhal, Gwan S. Choi, Rabi N. Mahapatra
INFOCOM
2002
IEEE
13 years 10 months ago
Constraint-based path selection methods for on-demand provisioning in WDM networks
Abstract-- We propose a framework for decentralized path selection and on-demand wavelength channel provisioning in WDM networks with routing constraints. Within this framework, th...
Admela Jukan, Gerald Franzl
VLSID
2006
IEEE
150views VLSI» more  VLSID 2006»
14 years 5 months ago
A Comprehensive SoC Design Methodology for Nanometer Design Challenges
SoC design methodologies are under constant revision due to adoption of fast shrinking process technologies at nanometer levels. Nanometer process geometries exhibit new complex d...
R. Raghavendra Kumar, Ricky Bedi, Ramadas Rajagopa...