2 search results - page 1 / 1 » Instruction Recycling on a Multiple-Path Processor |
HPCA
1999
IEEE
13 years 9 months ago
1999
IEEE
Processors that can simultaneously execute multiple paths of execution will only exacerbate the fetch bandwidth problem already plaguing conventional processors. On a multiple-pat...
ISCA
1998
IEEE
13 years 9 months ago
1998
IEEE
Control-flow misprediction penalties are a major impediment to high performance in wide-issue superscalar processors. In this paper we present Selective Eager Execution (SEE), an ...