138 search results - page 1 / 28 » Instruction Scheduling and Executable Editing |
MICRO
1996
IEEE
13 years 8 months ago
1996
IEEE
Modern microprocessors offer more instruction-level parallelism than most programs and compilers can currently exploit. The resulting disparity between a machine's peak and a...
ISCA
1999
IEEE
13 years 8 months ago
1999
IEEE
State of the art microprocessors achieve high performance by executing multiple instructions per cycle. In an out-oforder engine, the instruction scheduler is responsible for disp...
PLDI
1995
ACM
13 years 8 months ago
1995
ACM
EEL (Executable Editing Library) is a library for building tools to analyze and modify an executable (compiled) program. The systems and languages communities have built many tool...
IPPS
1999
IEEE
13 years 8 months ago
1999
IEEE
VLIW machines possibly provide the most direct way to exploit instruction level parallelism; however, they cannot be used to emulate current general-purpose instruction set archit...
ISCA
2002
IEEE
13 years 9 months ago
2002
IEEE
The number of pipeline stages separating dynamic instruction scheduling from instruction execution has increased considerably in recent out-of-order microprocessor implementations...