120 search results - page 2 / 24 » Instructor Selector Generation from Architecture Description |
LCTRTS
2010
Springer
13 years 11 months ago
2010
Springer
In this paper, we present a novel system modeling language which targets primarily the development of source-level multiprocessor memory aware optimizations. In contrast to previo...
FPGA
2000
ACM
13 years 8 months ago
2000
ACM
In this paper we present a "high-level" FPGA architecture description language which lets FPGA architects succinctly and quickly describe an FPGA routing architecture. W...
ISSS
1999
IEEE
13 years 8 months ago
1999
IEEE
Abstract--Reservation Tables (RTs) have long been used to detect conflicts between operations that simultaneously access the same architectural resource. Traditionally, these RTs h...
WICSA
2004
13 years 5 months ago
2004
MEMICS
2010
12 years 11 months ago
2010