This paper deals with feedback controller synthesis for timed event graphs in dioids, where the number of initial tokens and time delays are only known to belong to intervals. We ...
Mehdi Lhommeau, Laurent Hardouin, Bertrand Cottenc...
Recent developments in runtime verification and monitoring show that parametric regular and temporal logic specifications can be efficiently monitored against large programs. Howev...
Patrick O'Neil Meredith, Dongyun Jin, Feng Chen, G...
Two base algorithms are known for reachability verification over timed automata. They are called forward and backwards, and traverse the automata edges using either successors or p...
Abstract. Recently, it has been shown that for any higher order pushdown system H and for any regular set C of configurations, the set pre H(C), is regular. In this paper, we give ...
We present a general approach to combine symbolic state space representations for the discrete and continuous parts in the synthesis of winning strategies for timed reachability ga...