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» Integrated Design Environment for Reconfigurable HPC
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ARC
2010
Springer
183views Hardware» more  ARC 2010»
13 years 4 months ago
Integrated Design Environment for Reconfigurable HPC
Using FPGAs to accelerate High Performance Computing (HPC) applications is attractive, but has a huge associated cost: the time spent, not for developing efficient FPGA code but fo...
Lilian Janin, Shoujie Li, Doug Edwards
SC
2009
ACM
13 years 11 months ago
Bridging parallel and reconfigurable computing with multilevel PGAS and SHMEM+
Reconfigurable computing (RC) systems based on FPGAs are becoming an increasingly attractive solution to building parallel systems of the future. Applications targeting such syste...
Vikas Aggarwal, Alan D. George, K. Yalamanchili, C...
ICPADS
2010
IEEE
13 years 2 months ago
Hybrid Checkpointing for MPI Jobs in HPC Environments
As the core count in high-performance computing systems keeps increasing, faults are becoming common place. Checkpointing addresses such faults but captures full process images ev...
Chao Wang, Frank Mueller, Christian Engelmann, Ste...
ISCAS
2003
IEEE
129views Hardware» more  ISCAS 2003»
13 years 9 months ago
SONICmole: a debugging environment for the UltraSONIC reconfigurable computer
Reconfigurable Computers based on a combination of conventional microprocessors and Field Programmable Gate Arrays (FPGAs) presents new challenges to designers. Debugging on such ...
Theerayod Wiangtong, Chun Te Ewe, Peter Y. K. Cheu...
SNPD
2003
13 years 5 months ago
An Integrated Design Environment for Collaborative Tailoring
In this paper, we describe an approach and a prototype to enable participatory, collaborative tailoring of and within a groupware application. Our approach suggests extending the ...
Volkmar Pipek