2 search results - page 1 / 1 » Integrated interlayer via planning and pin assignment for 3D... |
SLIP
2009
ACM
13 years 10 months ago
2009
ACM
As technology advances, 3D ICs are introduced for alleviating the interconnect problem coming with shrinking feature size and increasing integration density. In 3D ICs, one of the...
ASPDAC
2012
ACM
11 years 12 months ago
2012
ACM
— Since re-designing and re-optimizing existing logic, memory, and IP blocks in a 3D fashion significantly increases design cost, nearterm three-dimensional integrated circuit (...