Sciweavers

37 search results - page 8 / 8
» Integrated prefetching and caching in single and parallel di...
Sort
View
HPCA
2007
IEEE
14 years 5 months ago
A Low Overhead Fault Tolerant Coherence Protocol for CMP Architectures
It is widely accepted that transient failures will appear more frequently in chips designed in the near future due to several factors such as the increased integration scale. On t...
Ricardo Fernández Pascual, José M. G...
HPCA
2011
IEEE
12 years 9 months ago
Beyond block I/O: Rethinking traditional storage primitives
Over the last twenty years the interfaces for accessing persistent storage within a computer system have remained essentially unchanged. Simply put, seek, read and write have deļ¬...
Xiangyong Ouyang, David W. Nellans, Robert Wipfel,...