29 search results - page 2 / 6 » Intelligent memory manager: Reducing cache pollution due to ... |
DELTA
2008
IEEE
13 years 7 months ago
2008
IEEE
As semiconductor technology advances, the performance gap between processor and memory has become one of the major issues in computer design. In order to bridge this gap, many met...
ISCA
2005
IEEE
13 years 11 months ago
2005
IEEE
As processor speeds increase and memory latency becomes more critical, intelligent design and management of secondary caches becomes increasingly important. The efficiency of curr...
ANCS
2010
ACM
13 years 3 months ago
2010
ACM
TCP/IP, the most commonly used network protocol, consumes a significant portion of time in Internet servers. While a wide spectrum of studies has been done to reduce its processin...
DATE
2007
IEEE
13 years 11 months ago
2007
IEEE
Partitioning a memory into multiple blocks that can be independently accessed is a widely used technique to reduce its dynamic power. For embedded systems, its benefits can be ev...
PLDI
2009
ACM
13 years 10 months ago
2009
ACM
More and more server workloads are becoming Web-based. In these Web-based workloads, most of the memory objects are used only during one transaction. We study the effect of the me...