154 search results - page 30 / 31 » Interconnect Optimization Strategies for High-Performance VL... |
IPCCC
2007
IEEE
13 years 11 months ago
2007
IEEE
Rapidly-spreading malicious software is an important threat on today’s computer networks. Most solutions that have been proposed to counter this threat are based on our ability ...
SBCCI
2005
ACM
13 years 10 months ago
2005
ACM
The designer of a system on a chip (SoC) that connects IP cores through a network on chip (NoC) needs methods to support application performance evaluation. Two key aspects these ...
SAMOS
2004
Springer
13 years 10 months ago
2004
Springer
In recent years, power consumption has become a critical concern for many VLSI systems. Whereas several case studies demonstrate that technology-, layout-, and gate-level technique...
ICCAD
2001
IEEE
14 years 2 months ago
2001
IEEE
In high-speed digital VLSI design, bounding the load capacitance at gate outputs is a well-known methodology to improve coupling noise immunity, reduce degradation of signal trans...
ICCV
2011
IEEE
12 years 5 months ago
2011
IEEE
Cascades are a popular framework to speed up object detection systems. Here we focus on the first layers of a category independent object detection cascade in which we sample a l...