4 search results - page 1 / 1 » Interconnect and Thermal-aware Floorplanning for 3D Micropro... |
TPDS
2010
13 years 2 months ago
2010
Abstract—A rising horizon in chip fabrication is the 3D integration technology. It stacks two or more dies vertically with a dense, highspeed interface to increase the device den...
ISQED
2006
IEEE
13 years 10 months ago
2006
IEEE
Interconnects are becoming an increasing problem from both performance and power consumption perspective in fu
ASPDAC
2006
ACM
13 years 10 months ago
2006
ACM
- Although the emerging three-dimensional integration technology can significantly reduce interconnect delay, chip area, and power dissipation in nanometer technologies, its impact...
MICRO
2006
IEEE
13 years 10 months ago
2006
IEEE
3D die stacking is an exciting new technology that increases transistor density by vertically integrating two or more die with a dense, high-speed interface. The result of 3D die ...