7 search results - page 2 / 2 » Interconnect layout optimization under higher-order RLC mode... |
ASPDAC
1998
ACM
13 years 9 months ago
1998
ACM
- In this paper, we study the wire sizing and wire spacing problem for post-layout performance optimization under Elmore delay model. Both ground capacitance and coupled capacitanc...
ISPD
1997
ACM
13 years 9 months ago
1997
ACM
The wire sizing problem under inequality Elmore delay constraints is known to be posynomial, hence convex under an exponential variable-transformation. There are formal methods fo...