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SLIP
2004
ACM
13 years 9 months ago
Interconnect-power dissipation in a microprocessor
Interconnect power is dynamic power dissipation due to switching of interconnection capacitances. This paper describes the characterization of interconnect power in a state-of-the...
Nir Magen, Avinoam Kolodny, Uri C. Weiser, Nachum ...
CF
2007
ACM
13 years 8 months ago
Speculative supplier identification for reducing power of interconnects in snoopy cache coherence protocols
In this work we reduce interconnect power dissipation in Symmetric Multiprocessors or SMPs. We revisit snoopy cache coherence protocols and reduce unnecessary interconnect activit...
Ehsan Atoofian, Amirali Baniasadi, Kaveh Aasaraai
HPCA
2001
IEEE
14 years 4 months ago
Dynamic Thermal Management for High-Performance Microprocessors
With the increasing clock rate and transistor count of today's microprocessors, power dissipation is becoming a critical component of system design complexity. Thermal and po...
David Brooks, Margaret Martonosi
ISLPED
1999
ACM
143views Hardware» more  ISLPED 1999»
13 years 8 months ago
Reducing power in superscalar processor caches using subbanking, multiple line buffers and bit-line segmentation
Modern microprocessors employ one or two levels of on-chip cachesto bridge the burgeoning speeddisparities between the processor and the RAM. These SRAM caches are a major source ...
Kanad Ghose, Milind B. Kamble
IPPS
2007
IEEE
13 years 10 months ago
A Power-Aware Prediction-Based Cache Coherence Protocol for Chip Multiprocessors
Snoopy cache coherence protocols broadcast requests to all nodes, reducing the latency of cache to cache transfer misses at the expense of increasing interconnect power. We propos...
Ehsan Atoofian, Amirali Baniasadi